Field of the Invention
This invention relates to systems and methods for designing and manufacturing a buffer manager.
Background of the Invention
Most chip designs use a centralized on-chip buffer memory to store user and system data. The buffer memories are implemented using fast on-chip SRAM. The centralized memory allows many different requestors (referred to as “Clients”) who want to read from and/or write to the memory to share the same SRAM resource. These systems control the on-chip buffer memory using a single functional module commonly referred to as a “Buffer Manager” and which takes in read and write requests from the different clients. The Buffer Manager is responsible for managing the buffer SRAM resource and servicing all of the Client requestors.
The Buffer Manager implementation can vary greatly depending on the type of system it is designed in. Many systems are focused on maximizing system bandwidth while others are more concerned with minimizing power consumption. In addition, the memory capacity requirements will also vary greatly based on cost and performance tradeoffs. Low cost systems will use as little memory as possible in order to minimize cost while higher-end systems may implement more on-chip memory in order to increase system performance.
Because of the tradeoffs that have to be made between performance, power consumption and area, the Buffer Manager design in a chip is typically customized towards the requirements of the end application. Systems that need high performance will optimize the design towards that end by adding memories and enabling more parallel accesses. System that need to minimize power will run the clock at lower frequencies and also throttle memory accesses. Low cost systems will also use smaller SRAMs.
With each different application that is built, a new custom Buffer Manager needs to be designed towards that specific application. Since the design requirements are often diametrically opposed (e.g. high performance versus low power/low cost), the Buffer Manager usually will undergo significant changes to its design in order to meet the different needs in each system. The changes made for each system result in longer product cycles due to the new design and verification time of a different design. In addition, there are also maintenance issues in having to maintain multiple design Buffer Manager databases when the implementations are very different.